Fully digital clock frequency doubler

نویسندگان

  • Gunok Jung
  • Gi-Ho Park
  • Ukrae Cho
  • Jae-Cheol Son
چکیده

This paper presents a clock frequency doubler, having the function of automatic adjustable duty cycle without feedback loops. The duty cycle amount can be automatically adjustable using digitized delay block and a counter. This simplifies the design structure and allows the circuit to operate over a wide range of input frequency variation. The simulation results show that this frequency doubler operates at a very wide variable input frequency ranging from 650MHz to 1.25GHz.

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عنوان ژورنال:
  • IEICE Electronic Express

دوره 7  شماره 

صفحات  -

تاریخ انتشار 2010